advanced power n-channel enhancement mode electronics corp. power mosfet low gate charge bv dss 100v single drive requirement r ds(on) 160m surface mount package i d 3a halogen free & rohs compliant product description absolute maximum ratin g s symbol units v ds v v gs v i d @t a =25 a i d @t a =70 a i dm a p d @t a =25 w t stg t j symbol value unit rthj-a maximum thermal resistance junction-ambient 3 50 /w data and specifications subject to change without notice halogen-free product 1 AP18T10GM-HF 201004141 parameter rating drain-source voltage 100 gate-source voltage + 20 continuous drain current 3 , v gs @ 10v 3 continuous drain current 3 , v gs @ 10v 2.1 pulsed drain current 1 12 total power dissipation 2.5 -55 to 150 operating junction temperature range -55 to 150 thermal data parameter storage temperature range g d s s s s g d d d d so-8 advanced power mosfets from apec provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. the so-8 package is widely preferred for commercial-industrial surface mount applications and suited for low voltage applications such as dc/dc converters.
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 100 - - v v gs =10v, i d =3a - - 160 m ? v gs =4.5v, i d =2a - - 225 m ? v gs(th) gate threshold voltage v ds =v gs , i d =250ua 1-3v g fs forward transconductance v ds =10v, i d =3a -4-s i dss drain-source leakage current v ds =80v, v gs =0v - - 10 ua i gss gate-source leakage v gs =+ 20v, v ds =0v --+ 100 na q g total gate charge 2 i d =3a - 5.5 8.8 nc q gs gate-source charge v ds =50v - 1.5 - nc q gd gate-drain ("miller") charge v gs =4.5v -3-nc t d(on) turn-on delay time 2 v ds =50v - 4.5 - ns t r rise time i d =1a -6-ns t d(off) turn-off delay time r g =3.3 -16-ns t f fall time v gs =10v - 5.5 - ns c iss input capacitance v gs =0v - 400 640 pf c oss output capacitance v ds =25v -75-pf c rss reverse transfer capacitance f=1.0mhz - 45 - pf r g gate resistance f=1.0mhz - 1.5 - ? source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =1.9a, v gs =0v - - 1.3 v t rr reverse recovery time 2 i s =3a, v gs =0 v , -40-ns q rr reverse recovery charge di/dt=100a/s - 70 - nc notes: 1.pulse width limited by max. junction temperature. 2.pulse test 3.surface mounted on 1 in 2 copper pad of fr4 board ; 125 /w when mounted on min. copper pad. this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. 2 AP18T10GM-HF r ds(on) static drain-source on-resistance 2
a p18t10gm-h f fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fi g 5. forward characteristic o f fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 0 4 8 12 16 20 02468 v ds , drain-to-source voltage (v) i d , drain current (a) 10v 7.0v 6.0v 5.0v v g =4.0v t a =25 o c 0 4 8 12 16 036912 v ds , drain-to-source voltage (v) i d , drain current (a) t a =150 o c 10v 8.0v 7.0v 6.0v v g =5.0v 0 2 4 6 8 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c 0.3 0.8 1.3 1.8 2.3 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =3a v g =10v 100 120 140 160 180 200 246810 v gs , gate-to-source voltage (v) r ds(on) (m ) i d =2a t a =25 o c 0.3 0.6 0.9 1.2 1.5 -50 0 50 100 150 t j , junction temperature ( o c) normalized v gs(th) (v)
ap18t10gm-h f fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 4 q v g 4.5v q gs q gd q g charge 0 100 200 300 400 500 600 1 5 9 1317212529 v ds , drain-to-source voltage (v) c (pf) f =1.0mhz c iss c oss c rss 0 2 4 6 8 10 0246810 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =3a v ds =50v 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) i d (a) 100us 1ms 10ms 100ms 1s dc t a =25 o c single pulse 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , pulse width (s) normalized thermal response (r thja ) 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse p dm duty factor = t/t peak t j = p dm x r thja + t a rthja = 125 /w t t 0.02 t d(on) t r t d(off) t f v ds v gs 10% 90% operation in this area limited by r ds(on)
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